350 lines
9.5 KiB
C
350 lines
9.5 KiB
C
/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32f1xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2019 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32f1xx_it.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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#include "string.h"
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern DMA_HandleTypeDef hdma_usart3_rx;
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extern DMA_HandleTypeDef hdma_uart4_rx;
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extern UART_HandleTypeDef huart3;
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extern UART_HandleTypeDef huart4;
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extern UART_HandleTypeDef huart2;
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extern UART_HandleTypeDef huart1;
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extern DMA_HandleTypeDef hdma_usart2_rx;
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extern uint8_t uart2_dma_buf[64];
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extern uint8_t uart2_frame_buf[64];
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extern volatile uint16_t uart2_frame_len;
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extern volatile uint8_t uart2_frame_ready;
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/* USER CODE BEGIN EV */
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#include "network.h"
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex-M3 Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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/* Ӳ<><D3B2><EFBFBD><EFBFBD><EFBFBD>ף<F3B6B5B5><D7A3><EFBFBD><EFBFBD><EFBFBD>ѯ<EFBFBD><D1AF>ʽ<EFBFBD><CABD> USART1 <20><>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD>ж<EFBFBD><D0B6>Ѳ<EFBFBD><D1B2>ɿ<EFBFBD><C9BF><EFBFBD><EFBFBD><EFBFBD>
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* ֮<><D6AE>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> IWDG <20><>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD>ڿ<EFBFBD><DABF><EFBFBD> "HARD FAULT" <20><>˵<EFBFBD><CBB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD> */
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{
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static const char msg[] = "\r\n!!! HARD FAULT, wait IWDG reset !!!\r\n";
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for (unsigned i = 0; i < sizeof(msg) - 1; i++) {
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while ((USART1->SR & USART_SR_TXE) == 0) { }
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USART1->DR = msg[i];
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}
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}
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while (1)
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{
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/* USER CODE BEGIN W1_HardFault_IRQn 0 */
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/* USER CODE END W1_HardFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Prefetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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}
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/* SVC_Handler / PendSV_Handler / SysTick_Handler <20><><EFBFBD><EFBFBD> FreeRTOS port.c <20>ṩ
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* <20><>FreeRTOSConfig.h <20><> vPortSVCHandler/xPortPendSVHandler/xPortSysTickHandler
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* <20><>ӳ<EFBFBD>䵽 CMSIS <20><><EFBFBD><D7BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD><CBB4><EFBFBD><EFBFBD>ٶ<EFBFBD><D9B6>壬<EFBFBD><E5A3AC><EFBFBD><EFBFBD><EFBFBD>ظ<EFBFBD><D8B8><EFBFBD>
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* HAL ʱ<><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD> TIM2<4D><32>SysTick <20><> FreeRTOS <20><> RTOS tick<63><6B><EFBFBD><EFBFBD> */
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/**
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* @brief This function handles TIM2 global interrupt (HAL timebase).
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*/
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extern TIM_HandleTypeDef htim2;
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void TIM2_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM2_IRQn 0 */
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/* USER CODE END TIM2_IRQn 0 */
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HAL_TIM_IRQHandler(&htim2);
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/* USER CODE BEGIN TIM2_IRQn 1 */
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/* USER CODE END TIM2_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32F1xx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32f1xx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles USART1 global interrupt.
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*/
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void USART1_IRQHandler(void)
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{
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/* USER CODE BEGIN USART1_IRQn 0 */
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/* USER CODE END USART1_IRQn 0 */
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HAL_UART_IRQHandler(&huart1);
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/* USER CODE BEGIN USART1_IRQn 1 */
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/* USER CODE END USART1_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 channel3 global interrupt.
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*/
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void DMA1_Channel6_IRQHandler(void)
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{
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HAL_DMA_IRQHandler(&hdma_usart2_rx);
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}
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void DMA1_Channel3_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel3_IRQn 0 */
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/* USER CODE END DMA1_Channel3_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart3_rx);
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/* USER CODE BEGIN DMA1_Channel3_IRQn 1 */
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/* USER CODE END DMA1_Channel3_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2 channel3 global interrupt (UART4_RX / WiFi).
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*/
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void DMA2_Channel3_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2_Channel3_IRQn 0 */
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/* USER CODE END DMA2_Channel3_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_uart4_rx);
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/* USER CODE BEGIN DMA2_Channel3_IRQn 1 */
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/* USER CODE END DMA2_Channel3_IRQn 1 */
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}
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/**
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* @brief This function handles UART4 global interrupt (WiFi ESP-01S, DMA+IDLE).
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*/
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void UART4_IRQHandler(void)
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{
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/* USER CODE BEGIN UART4_IRQn 0 */
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uint32_t temp;
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if ((__HAL_UART_GET_FLAG(&huart4, UART_FLAG_IDLE) != RESET))
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{
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/* <20><><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD> */
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__HAL_UART_CLEAR_IDLEFLAG(&huart4);
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/* ʧЧDMA<4D><41><EFBFBD><EFBFBD> */
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HAL_UART_DMAStop(&huart4);
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/* <20><>ȡ<EFBFBD><C8A1><EFBFBD>ճ<EFBFBD><D5B3>ȣ<EFBFBD><C8A3>ܴ<EFBFBD>С-ʣ<><CAA3><EFBFBD><EFBFBD>С */
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temp = huart4.hdmarx->Instance->CNDTR;
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Rx_Len = Rx_Max - temp;
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/* <>ӵ<EFBFBD> U2_CopyBuff <20><> AT ָ<><D6B8>/MQTT <20><><EFBFBD>Ľ<EFBFBD><C4BD><EFBFBD><EFBFBD><EFBFBD>
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* <20><> USART3 <20><><EFBFBD><EFBFBD>ͬһ<CDAC><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> WiFi <20><><EFBFBD>˼<EFBFBD><CBBC><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ӣ<EFBFBD><D3A3><EFBFBD>ֹ<EFBFBD><D6B9>·<EFBFBD><C2B7><EFBFBD>ݽ<EFBFBD>֯ */
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if (Rx_Len > 0 && NET_GetActiveBackend() == NET_BACKEND_WIFI &&
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(U2_CopyIndex + Rx_Len) < (U2_COPY_SIZE - 1))
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{
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memcpy(U2_CopyBuff + U2_CopyIndex, Rx_Buf, Rx_Len);
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U2_CopyIndex += Rx_Len;
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U2_CopyBuff[U2_CopyIndex] = '\0';
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U2_CopyFlag = 1;
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}
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/* ʹ<>ܽ<EFBFBD><DCBD><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD> */
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HAL_UART_Receive_DMA(&huart4, Rx_Buf, Rx_Max);
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}
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/* USER CODE END UART4_IRQn 0 */
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HAL_UART_IRQHandler(&huart4);
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/* USER CODE BEGIN UART4_IRQn 1 */
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/* USER CODE END UART4_IRQn 1 */
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}
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/**
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* @brief This function handles USART2 global interrupt.
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*/
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void USART2_IRQHandler(void)
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{
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/* USER CODE BEGIN USART2_IRQn 0 */
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/* 485 <20><>֡<EFBFBD><D6A1><EFBFBD>磺<EFBFBD><E7A3BA>·<EFBFBD><C2B7>Ĭ<EFBFBD><C4AC><EFBFBD><EFBFBD> IDLE<4C><45>DMA <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ｔһ֡<D2BB><D6A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
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if (__HAL_UART_GET_FLAG(&huart2, UART_FLAG_IDLE) != RESET)
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{
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__HAL_UART_CLEAR_IDLEFLAG(&huart2);
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HAL_UART_DMAStop(&huart2);
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uint16_t len = (uint16_t)(sizeof(uart2_dma_buf) - huart2.hdmarx->Instance->CNDTR);
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if (len > 0 && !uart2_frame_ready) {
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memcpy(uart2_frame_buf, uart2_dma_buf, len);
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uart2_frame_len = len;
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uart2_frame_ready = 1;
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}
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HAL_UART_Receive_DMA(&huart2, uart2_dma_buf, sizeof(uart2_dma_buf));
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__HAL_UART_ENABLE_IT(&huart2, UART_IT_IDLE);
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}
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/* USER CODE END USART2_IRQn 0 */
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HAL_UART_IRQHandler(&huart2);
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/* USER CODE BEGIN USART2_IRQn 1 */
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/* USER CODE END USART2_IRQn 1 */
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}
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/**
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* @brief This function handles USART3 global interrupt.
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*/
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void USART3_IRQHandler(void)
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{
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/* USER CODE BEGIN USART3_IRQn 0 */
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uint32_t temp;
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if ((__HAL_UART_GET_FLAG(&huart3, UART_FLAG_IDLE) != RESET))
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{
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/* <20><><EFBFBD><EFBFBD>״̬<D7B4>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݼĴ<DDBC><C4B4><EFBFBD> */
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__HAL_UART_CLEAR_IDLEFLAG(&huart3);
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/* ʧЧDMA<4D><41><EFBFBD><EFBFBD> */
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HAL_UART_DMAStop(&huart3);
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/* <20><>ȡ<EFBFBD><C8A1><EFBFBD>ճ<EFBFBD><D5B3>ȣ<EFBFBD><C8A3>ܴ<EFBFBD>С-ʣ<><CAA3><EFBFBD><EFBFBD>С */
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temp = huart3.hdmarx->Instance->CNDTR;
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Rx_Len = Rx_Max - temp;
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/* <>ӵ<EFBFBD> U2_CopyBuff <20><> AT ָ<><D6B8>/MQTT <20><>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <20><> UART4 <20><><EFBFBD><EFBFBD>ͬһ<CDAC><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 4G <20><><EFBFBD>˼<EFBFBD><CBBC><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ӣ<EFBFBD><D3A3><EFBFBD>ֹ<EFBFBD><D6B9>·<EFBFBD><C2B7><EFBFBD>ݽ<EFBFBD>֯ */
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if (Rx_Len > 0 && NET_GetActiveBackend() == NET_BACKEND_4G &&
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(U2_CopyIndex + Rx_Len) < (U2_COPY_SIZE - 1))
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{
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memcpy(U2_CopyBuff + U2_CopyIndex, Rx_Buf, Rx_Len);
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U2_CopyIndex += Rx_Len;
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U2_CopyBuff[U2_CopyIndex] = '\0';
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U2_CopyFlag = 1;
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}
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/* ʹ<>ܽ<EFBFBD><DCBD><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD> */
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HAL_UART_Receive_DMA(&huart3, Rx_Buf, Rx_Max);
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}
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/* USER CODE END USART3_IRQn 0 */
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HAL_UART_IRQHandler(&huart3);
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/* USER CODE BEGIN USART3_IRQn 1 */
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/* USER CODE END USART3_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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