433 lines
11 KiB
C
433 lines
11 KiB
C
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#include "w25q64.h"
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#include "log.h"
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#include "app_loop.h" /* storage_lock/unlock<63><6B><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʻ<EFBFBD><CABB><EFBFBD> */
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#include <string.h>
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/* *******************************************
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* <EFBFBD><EFBFBD><EFBFBD><EFBFBD> SPI λ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>꣨<EFBFBD><EFBFBD><EFBFBD><EFBFBD> main.h <EFBFBD>ж<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ţ<EFBFBD>
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* ******************************************* */
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#ifndef W25Q64_CS_L
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#define W25Q64_CS_L() HAL_GPIO_WritePin(W25Q64_CS_PORT, W25Q64_CS_PIN, GPIO_PIN_RESET)
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#define W25Q64_CS_H() HAL_GPIO_WritePin(W25Q64_CS_PORT, W25Q64_CS_PIN, GPIO_PIN_SET)
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#define W25Q64_CLK_L() HAL_GPIO_WritePin(W25Q64_CLK_PORT, W25Q64_CLK_PIN, GPIO_PIN_RESET)
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#define W25Q64_CLK_H() HAL_GPIO_WritePin(W25Q64_CLK_PORT, W25Q64_CLK_PIN, GPIO_PIN_SET)
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#define W25Q64_DI_L() HAL_GPIO_WritePin(W25Q64_DI_PORT, W25Q64_DI_PIN, GPIO_PIN_RESET)
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#define W25Q64_DI_H() HAL_GPIO_WritePin(W25Q64_DI_PORT, W25Q64_DI_PIN, GPIO_PIN_SET)
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#define W25Q64_DO_READ() HAL_GPIO_ReadPin (W25Q64_DO_PORT, W25Q64_DO_PIN)
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#endif
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static void W25Q64_Delay(void)
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{
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/* 72MHz <20><> GPIO <20><>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>㹻<EFBFBD><E3B9BB>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ղ<EFBFBD><D5B2><EFBFBD><EFBFBD>ȶ<EFBFBD>ʱ<EFBFBD><CAB1> */
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__NOP(); __NOP(); __NOP(); __NOP();
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}
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static uint8_t W25Q64_SPI_TransferByte(uint8_t tx)
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{
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uint8_t rx = 0;
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for (int i = 0; i < 8; i++) {
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if (tx & 0x80) W25Q64_DI_H(); else W25Q64_DI_L();
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tx <<= 1;
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W25Q64_Delay();
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W25Q64_CLK_H();
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W25Q64_Delay();
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rx <<= 1;
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if (W25Q64_DO_READ() == GPIO_PIN_SET) rx |= 0x01;
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W25Q64_CLK_L();
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}
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return rx;
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}
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static void W25Q64_SPI_WriteByte(uint8_t tx)
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{
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(void)W25Q64_SPI_TransferByte(tx);
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}
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static uint8_t W25Q64_SPI_ReadByte(void)
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{
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return W25Q64_SPI_TransferByte(0xFF);
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}
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/* *******************************************
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* <EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>
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* ******************************************* */
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uint8_t W25Q64_Init(void)
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{
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GPIO_InitTypeDef gpio = {0};
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__HAL_RCC_GPIOA_CLK_ENABLE();
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__HAL_RCC_GPIOB_CLK_ENABLE();
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__HAL_RCC_AFIO_CLK_ENABLE();
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/* <20>ͷ<EFBFBD> PA15<31><35>PB3<42><33>PB4 <20><>Ϊ GPIO<49><4F><EFBFBD>ر<EFBFBD> JTAG<41><47><EFBFBD><EFBFBD><EFBFBD><EFBFBD> SWD<57><44> */
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__HAL_AFIO_REMAP_SWJ_NOJTAG();
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gpio.Mode = GPIO_MODE_OUTPUT_PP;
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gpio.Pull = GPIO_NOPULL;
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gpio.Speed = GPIO_SPEED_FREQ_HIGH;
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gpio.Pin = W25Q64_CS_PIN; HAL_GPIO_Init(W25Q64_CS_PORT, &gpio);
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gpio.Pin = W25Q64_CLK_PIN; HAL_GPIO_Init(W25Q64_CLK_PORT, &gpio);
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gpio.Pin = W25Q64_DI_PIN; HAL_GPIO_Init(W25Q64_DI_PORT, &gpio);
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gpio.Mode = GPIO_MODE_INPUT;
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gpio.Pull = GPIO_PULLUP;
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gpio.Pin = W25Q64_DO_PIN; HAL_GPIO_Init(W25Q64_DO_PORT, &gpio);
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W25Q64_CS_H();
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W25Q64_CLK_L();
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W25Q64_DI_L();
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uint8_t id[3] = {0};
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W25Q64_ReadID(id);
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uint32_t id32 = ((uint32_t)id[0] << 16) | ((uint32_t)id[1] << 8) | id[2];
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if (id32 != W25Q64_JEDEC_ID) {
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log_error("> W25Q64 <20><>ʼ<EFBFBD><CABC>ʧ<EFBFBD><CAA7>! ID=0x%06X", (unsigned)id32);
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return 1; /* ID <20><>ƥ<EFBFBD><C6A5> */
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}
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log_info("> W25Q64 <20><>ʼ<EFBFBD><CABC><EFBFBD>ɹ<EFBFBD>, ID=0x%06X", (unsigned)id32);
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return 0;
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}
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void W25Q64_ReadID(uint8_t *id3)
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{
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W25Q64_CS_L();
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W25Q64_SPI_WriteByte(W25Q64_CMD_READ_ID);
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id3[0] = W25Q64_SPI_ReadByte();
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id3[1] = W25Q64_SPI_ReadByte();
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id3[2] = W25Q64_SPI_ReadByte();
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W25Q64_CS_H();
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}
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uint8_t W25Q64_ReadStatus(void)
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{
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uint8_t status;
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W25Q64_CS_L();
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W25Q64_SPI_WriteByte(W25Q64_CMD_READ_STATUS1);
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status = W25Q64_SPI_ReadByte();
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W25Q64_CS_H();
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return status;
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}
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void W25Q64_WaitBusy(void)
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{
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while (W25Q64_ReadStatus() & 0x01) {
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__NOP();
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}
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}
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void W25Q64_WriteEnable(void)
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{
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W25Q64_WaitBusy();
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W25Q64_CS_L();
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W25Q64_SPI_WriteByte(W25Q64_CMD_WRITE_ENABLE);
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W25Q64_CS_H();
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}
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static void W25Q64_WriteAddr(uint32_t addr)
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{
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W25Q64_SPI_WriteByte((uint8_t)(addr >> 16));
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W25Q64_SPI_WriteByte((uint8_t)(addr >> 8));
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W25Q64_SPI_WriteByte((uint8_t)(addr));
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}
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void W25Q64_SectorErase(uint32_t addr)
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{
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W25Q64_WriteEnable();
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W25Q64_WaitBusy();
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W25Q64_CS_L();
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W25Q64_SPI_WriteByte(W25Q64_CMD_SECTOR_ERASE);
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W25Q64_WriteAddr(addr);
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W25Q64_CS_H();
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W25Q64_WaitBusy();
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}
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void W25Q64_BlockErase(uint32_t addr)
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{
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W25Q64_WriteEnable();
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W25Q64_WaitBusy();
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W25Q64_CS_L();
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W25Q64_SPI_WriteByte(W25Q64_CMD_BLOCK_ERASE);
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W25Q64_WriteAddr(addr);
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W25Q64_CS_H();
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W25Q64_WaitBusy();
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}
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void W25Q64_ChipErase(void)
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{
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W25Q64_WriteEnable();
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W25Q64_WaitBusy();
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W25Q64_CS_L();
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W25Q64_SPI_WriteByte(W25Q64_CMD_CHIP_ERASE);
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W25Q64_CS_H();
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W25Q64_WaitBusy();
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}
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void W25Q64_PageProgram(uint32_t addr, const uint8_t *data, uint16_t len)
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{
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if (len == 0 || len > W25Q64_PAGE_SIZE) return;
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W25Q64_WriteEnable();
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W25Q64_WaitBusy();
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W25Q64_CS_L();
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W25Q64_SPI_WriteByte(W25Q64_CMD_PAGE_PROGRAM);
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W25Q64_WriteAddr(addr);
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for (uint16_t i = 0; i < len; i++) {
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W25Q64_SPI_WriteByte(data[i]);
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}
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W25Q64_CS_H();
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W25Q64_WaitBusy();
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}
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void W25Q64_Read(uint32_t addr, uint8_t *buf, uint32_t len)
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{
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storage_lock();
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W25Q64_CS_L();
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W25Q64_SPI_WriteByte(W25Q64_CMD_READ_DATA);
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W25Q64_WriteAddr(addr);
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for (uint32_t i = 0; i < len; i++) {
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buf[i] = W25Q64_SPI_ReadByte();
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}
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W25Q64_CS_H();
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storage_unlock();
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}
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void W25Q64_EraseRegion(uint32_t addr, uint32_t size)
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{
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if (size == 0) return;
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storage_lock();
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uint32_t end = addr + size - 1;
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uint32_t pos = addr;
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/* <20><><EFBFBD>뵽 64KB Block <20>߽<EFBFBD> */
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while ((pos & (W25Q64_BLOCK_SIZE - 1)) != 0 && pos <= end) {
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W25Q64_SectorErase(pos);
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pos += W25Q64_SECTOR_SIZE;
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}
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/* 64KB Block <20><><EFBFBD><EFBFBD> */
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while ((pos + W25Q64_BLOCK_SIZE - 1) <= end) {
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W25Q64_BlockErase(pos);
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pos += W25Q64_BLOCK_SIZE;
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}
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/* ʣ<><CAA3> 4KB Sector */
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while (pos <= end) {
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W25Q64_SectorErase(pos);
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pos += W25Q64_SECTOR_SIZE;
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}
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storage_unlock();
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}
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int W25Q64_WriteBuffer(uint32_t addr, const uint8_t *data, uint32_t len)
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{
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storage_lock();
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while (len) {
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uint32_t page_offset = addr & (W25Q64_PAGE_SIZE - 1);
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uint32_t page_remain = W25Q64_PAGE_SIZE - page_offset;
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uint16_t chunk = (len > page_remain) ? (uint16_t)page_remain : (uint16_t)len;
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W25Q64_PageProgram(addr, data, chunk);
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addr += chunk;
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data += chunk;
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len -= chunk;
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}
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storage_unlock();
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return 1;
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}
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int W25Q64_Verify(uint32_t addr, const uint8_t *data, uint32_t len)
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{
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storage_lock();
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while (len) {
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uint16_t chunk = (len > 256) ? 256 : (uint16_t)len;
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uint8_t tmp[256];
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W25Q64_Read(addr, tmp, chunk);
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if (memcmp(tmp, data, chunk) != 0) { storage_unlock(); return 0; }
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addr += chunk;
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data += chunk;
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len -= chunk;
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}
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storage_unlock();
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return 1;
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}
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/* *******************************************
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* OTA <EFBFBD><EFBFBD>Ϣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>˫<EFBFBD><EFBFBD><EFBFBD><EFBFBD>У<EFBFBD><EFBFBD><EFBFBD>ͣ<EFBFBD>
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* ******************************************* */
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static uint16_t W25Q64_InfoChecksum(const W25Q64_OtaInfo *info)
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{
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const uint8_t *p = (const uint8_t *)info;
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uint16_t sum = 0;
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for (uint32_t i = 0; i < (sizeof(W25Q64_OtaInfo) - 2); i++) {
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sum += p[i];
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}
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return sum;
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}
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static int W25Q64_InfoValid(const W25Q64_OtaInfo *info)
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{
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if (info->magic != W25Q64_INFO_MAGIC) return 0;
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return (info->checksum == W25Q64_InfoChecksum(info)) ? 1 : 0;
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}
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int W25Q64_OTA_ReadInfo(W25Q64_OtaInfo *info)
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{
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W25Q64_OtaInfo a, b;
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int va = 0, vb = 0;
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storage_lock();
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W25Q64_Read(W25Q64_INFO_SECTOR_A, (uint8_t *)&a, sizeof(a));
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W25Q64_Read(W25Q64_INFO_SECTOR_B, (uint8_t *)&b, sizeof(b));
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va = W25Q64_InfoValid(&a);
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vb = W25Q64_InfoValid(&b);
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if (!va && !vb) {
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memset(info, 0, sizeof(*info));
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storage_unlock();
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return -1;
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}
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if (va && vb) {
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*info = (a.sequence >= b.sequence) ? a : b;
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} else if (va) {
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*info = a;
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} else {
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*info = b;
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}
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storage_unlock();
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return 0;
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}
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int W25Q64_OTA_WriteInfo(const W25Q64_OtaInfo *info)
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{
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W25Q64_OtaInfo tmp = *info;
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tmp.checksum = W25Q64_InfoChecksum(&tmp);
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storage_lock();
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/* <20><>д<EFBFBD><D0B4> A <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4> B <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ٱ<EFBFBD><D9B1><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD> */
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W25Q64_SectorErase(W25Q64_INFO_SECTOR_A);
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W25Q64_WriteBuffer(W25Q64_INFO_SECTOR_A, (const uint8_t *)&tmp, sizeof(tmp));
|
|||
|
|
|
|||
|
|
W25Q64_SectorErase(W25Q64_INFO_SECTOR_B);
|
|||
|
|
W25Q64_WriteBuffer(W25Q64_INFO_SECTOR_B, (const uint8_t *)&tmp, sizeof(tmp));
|
|||
|
|
storage_unlock();
|
|||
|
|
return 0;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
int W25Q64_OTA_SetNewInfo(uint16_t version, uint32_t size, uint16_t crc16)
|
|||
|
|
{
|
|||
|
|
int ret;
|
|||
|
|
storage_lock();
|
|||
|
|
W25Q64_OtaInfo info;
|
|||
|
|
if (W25Q64_OTA_ReadInfo(&info) != 0) {
|
|||
|
|
memset(&info, 0, sizeof(info));
|
|||
|
|
info.magic = W25Q64_INFO_MAGIC;
|
|||
|
|
}
|
|||
|
|
info.sequence++;
|
|||
|
|
info.new_version = version;
|
|||
|
|
info.new_size = size;
|
|||
|
|
info.new_crc16 = crc16;
|
|||
|
|
info.new_valid = 1;
|
|||
|
|
info.update_state = W25Q64_STATE_DOWNLOADED;
|
|||
|
|
info.boot_trial_count = 0;
|
|||
|
|
info.app_confirmed = 0;
|
|||
|
|
info.backup_valid = 0; /* <20><><EFBFBD><EFBFBD><EFBFBD>غ<EFBFBD><D8BA><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD>θ<EFBFBD><CEB8><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD>±<EFBFBD><C2B1>ݵ<EFBFBD>ǰ APP */
|
|||
|
|
ret = W25Q64_OTA_WriteInfo(&info);
|
|||
|
|
storage_unlock();
|
|||
|
|
return ret;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
int W25Q64_OTA_SetBackupInfo(uint32_t size, uint16_t crc16)
|
|||
|
|
{
|
|||
|
|
int ret = 0;
|
|||
|
|
storage_lock();
|
|||
|
|
W25Q64_OtaInfo info;
|
|||
|
|
if (W25Q64_OTA_ReadInfo(&info) != 0) { storage_unlock(); return -1; }
|
|||
|
|
info.sequence++;
|
|||
|
|
info.backup_size = size;
|
|||
|
|
info.backup_crc16 = crc16;
|
|||
|
|
info.backup_valid = 1;
|
|||
|
|
ret = W25Q64_OTA_WriteInfo(&info);
|
|||
|
|
storage_unlock();
|
|||
|
|
return ret;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
int W25Q64_OTA_ClearNew(void)
|
|||
|
|
{
|
|||
|
|
int ret = 0;
|
|||
|
|
storage_lock();
|
|||
|
|
W25Q64_OtaInfo info;
|
|||
|
|
if (W25Q64_OTA_ReadInfo(&info) != 0) { storage_unlock(); return -1; }
|
|||
|
|
info.sequence++;
|
|||
|
|
info.new_valid = 0;
|
|||
|
|
info.update_state = W25Q64_STATE_IDLE;
|
|||
|
|
info.app_confirmed = 0;
|
|||
|
|
info.backup_valid = 0; /* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȷ<EFBFBD>ϣ<EFBFBD><CFA3>ɱ<EFBFBD><C9B1>ݲ<EFBFBD><DDB2><EFBFBD><EFBFBD><EFBFBD>Ч */
|
|||
|
|
ret = W25Q64_OTA_WriteInfo(&info);
|
|||
|
|
storage_unlock();
|
|||
|
|
return ret;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
int W25Q64_OTA_SetState(uint8_t state)
|
|||
|
|
{
|
|||
|
|
int ret = 0;
|
|||
|
|
storage_lock();
|
|||
|
|
W25Q64_OtaInfo info;
|
|||
|
|
if (W25Q64_OTA_ReadInfo(&info) != 0) { storage_unlock(); return -1; }
|
|||
|
|
info.sequence++;
|
|||
|
|
info.update_state = state;
|
|||
|
|
ret = W25Q64_OTA_WriteInfo(&info);
|
|||
|
|
storage_unlock();
|
|||
|
|
return ret;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
int W25Q64_OTA_IncTrial(void)
|
|||
|
|
{
|
|||
|
|
int ret = 0;
|
|||
|
|
storage_lock();
|
|||
|
|
W25Q64_OtaInfo info;
|
|||
|
|
if (W25Q64_OTA_ReadInfo(&info) != 0) { storage_unlock(); return -1; }
|
|||
|
|
info.sequence++;
|
|||
|
|
info.boot_trial_count++;
|
|||
|
|
ret = W25Q64_OTA_WriteInfo(&info);
|
|||
|
|
storage_unlock();
|
|||
|
|
return ret;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
int W25Q64_OTA_SetConfirmed(void)
|
|||
|
|
{
|
|||
|
|
int ret = 0;
|
|||
|
|
storage_lock();
|
|||
|
|
W25Q64_OtaInfo info;
|
|||
|
|
if (W25Q64_OTA_ReadInfo(&info) != 0) { storage_unlock(); return -1; }
|
|||
|
|
info.sequence++;
|
|||
|
|
info.app_confirmed = 1;
|
|||
|
|
ret = W25Q64_OTA_WriteInfo(&info);
|
|||
|
|
storage_unlock();
|
|||
|
|
return ret;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
int W25Q64_OTA_ClearConfirmed(void)
|
|||
|
|
{
|
|||
|
|
int ret = 0;
|
|||
|
|
storage_lock();
|
|||
|
|
W25Q64_OtaInfo info;
|
|||
|
|
if (W25Q64_OTA_ReadInfo(&info) != 0) { storage_unlock(); return -1; }
|
|||
|
|
info.sequence++;
|
|||
|
|
info.app_confirmed = 0;
|
|||
|
|
ret = W25Q64_OTA_WriteInfo(&info);
|
|||
|
|
storage_unlock();
|
|||
|
|
return ret;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
uint16_t W25Q64_CRC16(const uint8_t *data, uint32_t len)
|
|||
|
|
{
|
|||
|
|
uint16_t crc = 0xFFFF;
|
|||
|
|
for (uint32_t i = 0; i < len; i++) {
|
|||
|
|
crc ^= data[i];
|
|||
|
|
for (int b = 0; b < 8; b++) {
|
|||
|
|
if (crc & 0x0001) crc = (crc >> 1) ^ 0xA001;
|
|||
|
|
else crc >>= 1;
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
return crc;
|
|||
|
|
}
|